[1]
M. A. Naal, A. Bouchi, and T. A. Shaheen, “Reducing The Power Consumption of The CMOS CISC Processor by Reducing The Transitions between 0 and 1 in The Control Unit”, JESIT, vol. 6, no. 4, pp. 1–27, Jun. 2022, doi: 10.26389/AJSRP.E070122.